1. Technical Field
The present invention relates in general to data processing, and in particular to data storage devices. More specifically, the present invention relates to a method and system for preserving data resident in a volatile cache memory in the event of a power loss.
2. Description of the Related Art
As a general rule, central processors can process data significantly more quickly than it can be moved in and out of primary storage. Consequently, the performance of a computer system is substantially limited by the speed of its primary data storage devices and subsystems. In order to ameliorate this perceived xe2x80x9cbottleneck,xe2x80x9d central processor interaction with primary storage may be minimized by storing frequently referenced data in a relatively small, high-speed cache memory located between the processor and the primary storage devices. However, such cache memory, typically utilizing dynamic random access memory (DRAM) devices, is relatively costly per megabyte of storage compared to disk drives and, as such, the cache memory is generally of comparatively limited capacity. Small cache memories function relatively well for repeatedly small data burst loads but poorly for sustained loads.
When utilizing caching techniques, whenever a program issues a xe2x80x9creadxe2x80x9d command for an instruction or user data, the processor first looks in its cache memory. Should the requested data reside in the cache (a cache xe2x80x9chitxe2x80x9d), there is no need to attempt to read from primary storage located generally on one or more disk drives or subsystems. However, if the requested data is not available in the cache (a cache xe2x80x9cmissxe2x80x9d), the processor must then access primary storage to retrieve the data sought.
Data which must be retrieved from primary storage may then be written to the cache memory, where it may later be accessed by the processor. Alternatively, any data subsequently modified by the processor is also written to the cache memory. Inasmuch as the cache memory has relatively limited storage capacity, a data replacement algorithm is generally used to determine what existing data should be overwritten in the cache memory when additional data is read from primary storage. In this regard, conventional cache memory designs take advantage of a principle known as locality, with the two primary types of locality being referred to as temporal and spatial. The former refers to locality in time, or the tendency of data and subroutines that have been used recently to be used again in the near future. For example, loops in software programs tend to be executed many times, leading to reuse of the instructions in the loop. However, the amount of temporal locality of which a processor memory cache can take advantage of is related to the size of the cache memory, its organization and its data replacement strategy.
Some cache memories utilize an algorithm to xe2x80x9cprefetchxe2x80x9d data when a cache xe2x80x9cmissxe2x80x9d occurs. The process of prefetching cache data takes advantage of spatial locality, which refers to the tendency of computer programs to reference information that is located in proximity to recently accessed information. When a cache xe2x80x9cmissxe2x80x9d occurs, the cache memory prefetches data spatially related to the recently accessed information. Prefetching increases the probability that future cache hits will occur by anticipating the requirement for accesses to the data in the cache memory.
Due to its non-volatility and persistence as compared to cache memory, primary storage must be kept up-to-date, or coherent, with any new data written to the cache memory by the processor to ensure its availability. In this regard, two fundamental techniques are used for coordinating writes to the cache memory with primary storage, namely xe2x80x9cwrite-throughxe2x80x9d and xe2x80x9cwrite-backxe2x80x9d caching. In a write-through cache memory design, the processor writes the modified data to both the cache memory and the primary storage to ensure that both elements always have updated copies of the data. This is the simplest and most widely employed method. On the other hand, a write-back cache keeps track of, and marks, data in the cache memory that has been modified by the processor. When such modified data is ultimately displaced from the cache memory, the data is then written to primary storage. Because data may be modified a number of times prior to being removed from the cache memory, writing data to primary storage only when it is displaced from the cache memory obviates the processor overhead of repeatedly updating primary storage with the same cached data each time it is modified by the processor.
Although utilizing cache memory improves the overall system performance, there are certain attendant risks involved. For example, if the system utilizing the cache memory crashes due, e.g., to a loss of power, the system may not have sufficient time to copy the data in the cache memory back to the non-volatile primary storage. In this case, whatever changes were made to the data may not have been reflected in the primary storage and will be lost.
Accordingly, what is needed in the art is an improved method for caching data that mitigates the above-described limitations in the prior art. More particularly, what is needed in the art is an improved method for preserving data resident in a volatile cache memory in the event of a power loss.
It is therefore an object of the invention to provide an improved data storage unit.
It is another object of the invention to provide a method for preserving data resident in a volatile memory in the event of an interruption of supply power.
To achieve the foregoing objects, and in accordance with the invention as embodied and broadly described herein, a method for preserving data resident in a volatile memory of a data storage unit having at least one rotatable disk platter in the event of an interruption of a primary supply power. The method includes monitoring the status of the primary supply power to the data storage unit. Following the detection of a loss of the primary supply power, kinetic energy inherent in the spinning disk platter is converted into electrical energy. Alternatively, in another advantageous embodiment, the kinetic energy conversion to electrical energy is accomplished utilizing an auxiliary power generator. The electrical energy derived from the kinetic energy of the disk platter is then utilized to power the data storage unit to write the data in the volatile memory to a non-volatile memory medium in the data storage unit. In a related embodiment, the data storage unit positions a read/write head to an outer-most track of the rotatable disk platter where the data is written. In an advantageous embodiment, following the saving of the data in the volatile memory, the data storage unit parks the read/write head and brakes the spindle motor that is coupled to and operably utilized to spin the rotatable disk platter.
The foregoing description has outlined, rather broadly, preferred and alternative features of the present invention so that those skilled in the art may better understand the detailed description of the invention that follows. Additional features of the invention will be described hereinafter that form the subject matter of the claims of the invention. Those skilled in the art should appreciate that they can readily use the disclosed conception and specific embodiment as a basis for designing or modifying other structures for carrying out the same purposes of the present invention. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the invention in its broadest form.